CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER SCHS281A – REVISED MAY 2003DDDDDDDDD 4.5-V to 5.5-V VCC OperationInput Latches for BCD Code StorageBlanking CapabilityPhase Input for Complementing OutputsFanout (Over Temperature Range)– Standard Outputs – 10 LSTTL LoadsBalanced Propagation Delay and TransitionTimesSignificant Power Reduction, Compared toLSTTL Logic ICsDirect LSTTL Input Logic Compatibility, VIL = 0.8 V Maximum, VIH = 2 V MinimumCMOS Input Compatibility, II ≤1 µA at VOL,VOH0E PACKAGE(TOP VIEW)LDD2D1BCDInputsD3D0PHBIGND1234 5678161514131211109VCCfge7-SegmentdOutputscbaDISPLAY123fe4ag5bcd67description/ordering informationThe CD74HCT4543 high-speed silicon-gate is a BCD-to-7 segment latch/decoder/driver designed primarily fordirectly driving liquid-crystal displays. While the latch enable (LD) is low, the latches are enabled to store theBCD inputs. When the latch enable is high, the latches are disabled, making the outputs transparent to the BCDinputs. The device has an active-high blanking input (BI) and a phase input (PH) to which a square wave isapplied for liquid-crystal applications. This square wave also is applied to the backplane of the liquid-crystaldisplay.ORDERING INFORMATIONTA–55°C to 125°CPACKAGE†PDIP – ETubeORDERABLEPART NUMBERCD74HCT4543ETOP-SIDEMARKINGCD74HCT4543E†Package drawings, standard packing quantities, thermal data, symbolization, and PCBdesign guidelines are available at www.ti.com/sc/package.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA inormation is current as o publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.Copyright 2003, Texas Instruments IncorporatedPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•1SCHS281A – REVISED MAY 2003CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER FUNCTION TABLELDXHHHHHHHHHHHHHHHHLBIHLLLLLLLLLLLLLLLLLPHLLLLLLLLLLLLLLLLLLD3XLLLLLLLLHHHHHHHHXD2XLLLLHHHHLLLLHHHHXD1XLLHHLLHHLLHHLLHHXD0XLHLHLHLHLHLHLHLHXaLHLHHLHHHHHLLLLLLbLHHHHHLLHHHLLLLLLcLHHLHHHHHHLLLLLLLdLHLHHLHHLHHLLLLLL†eLHLHLLLHLHLLLLLLLfLHLLLHHHLHHLLLLLLgLLLHHHHHLHHLLLLLLDisplayBlank01234567BlankBlankBlankBlankBlankBlank†As above As aboveHAs aboveInverse of above†Depends on BCD code previously applied when LD = high.functional diagramPH6D05DecoderDriverLatch910111213abcdeD13BCDInputsD22D34LD17-SegmentOutputs15f14g7BIGND = 8VCC = 162POST OFFICE BOX 655303 DALLAS, TEXAS 75265• CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER SCHS281A – REVISED MAY 2003logic diagramBI79aD05D0Q0LatchLDLDLDLDQ010b11D13DQ112cLatchLDLDLDLDQ1dLDDnQn≡DnPnLDLDPneLDQnQnD22D2Q2LatchLDLDLDLDQ2LDQLDn13D34D3Q3LatchLDLDLDLDQ315fLD1LDLDPH614gPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•3SCHS281A – REVISED MAY 2003CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 VInput diode current, IIK (VI < –0.5 V or VI > VCC + 0.5 V) ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ±20 mAOutput diode current, IOK (VO < –0.5 V or VO > VCC + 0.5V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . ±20 mAContinuous output source or sink current per output, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . ±25 mAContinuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mAPackage thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/WAt distance 1/16 ±1/32 in. (1.59 ±0.79 mm) from case for 10 s maximum . . . . . . . . . . . . . . . . . . . . . 265°CUnit inserted into a PC board (min. thickness 1/16 in., 1.59 mm)with solder contacting lead tips only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°CStorage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150°C†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES:1.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.2.The package thermal impedance is calculated in accordance with JESD 51-7.recommended operating conditions (see Note 3)TA = 25°CMINVCCVIHVILVIVOttSupply voltageHigh-level input voltageLow-level input voltageInput voltageOutput voltageInput transition (rise and fall) time4.520.8VCCVCC500MAX5.5TA = –55°CTO 125°CMIN4.520.8VCCVCC500MAX5.5TA = –40°CTO 85°CMIN4.520.8VCCVCC500MAX5.5VVVVVnsUNITNOTE 3:All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)PARAMETERTEST CONDITIONSIOH = –20 µAIOH = –4 mAIOL = 20 µAIOL = 4 mAVCCMINVOHVOLIIICC∆ICC‡CiVI = V=VIH or VorVILVI = V=VIH or VorVILVI = VCC to GNDVI = VCC or 0,45V4.5 V45V4.5 V5.5 V5.5 V4.5 V to 5.5 V1004.43.980.10.26±0.1836010TA = 25°CTYPMAXTA = –55°CTO 125°CMIN4.43.70.10.4±116049010MAXTA = –40°CTO 85°CMIN4.43.840.10.33±18045010MAXVVµAµAµApFUNITIO = 0One input at VCC – 2.1 V,Other inputs at 0 or VCC‡Additional quiescent supply current per input pin, TTL inputs high, 1 unit load. For dual-supply systems, theoretical worst-case(VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA.4POST OFFICE BOX 655303 DALLAS, TEXAS 75265• CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER SCHS281A – REVISED MAY 2003HCT INPUT LOADING TABLEINPUTD0, D1, D2D3, BIPHLDUNIT LOADS†10.51.251.5†Unit Load is ∆ICC limit specified in electricalcharacteristics table, e.g., 360 µA maximumat 25°C.timing requirements over recommended operating free-air temperature range VCC = 4.5 V (unlessotherwise noted) (see Figure 1)TA = 25°CMINtwtsuthPulse duration, LD highSetup time, BCD inputs before LD↓Hold time, BCD inputs before LD↓10128MAXTA = –55°CTO 125°CMIN151812MAXTA = –40°CTO 85°CMIN131510MAXnsnsnsUNITswitching characteristics over recommended operating free-air temperature range (unlessotherwise noted) (see Figure 2)PARAMETERFROM(INPUT)DnLDtpddBIPHttOutputOutputAnyTO(OUTPUT)OutputOutputLOADCAPACITANCECL = 50 pFCL = 15 pFCL = 50 pFCL = 15 pFCL = 50 pFCL = 15 pFCL = 50 pFCL = 15 pFCL = 50 pFVCCMIN4.5 V5 V4.5 V5 V4.5 V5 V4.5 V5 V4.5 V27507563ns2766998332669983337711696nsTA = 25°CTYPMAX80TA = –55°CTO 125°CMINMAX120TA = –40°CTO 85°CMINMAX100UNIToperating characteristics, VCC = 5 V, TA = 25°CPARAMETERCpd‡Power dissipation capacitanceTYP54UNITpF‡Cpd is used to determine the dynamic power consumption, per package.PD = Cpd VCC2 fi + ∑CL VCC2 fo where:fi = input frequencyfo = output frequencyCL = output load capacitanceVCC = supply voltagePOST OFFICE BOX 655303 DALLAS, TEXAS 75265•5SCHS281A – REVISED MAY 2003CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER PARAMETER MEASUREMENT INFORMATIONVCCS1RL = 1 kΩPARAMETERtentPZHtPZLtPHZtPLZS1OpenClosedOpenClosedOpentwVCCInput50% VCCVOLTAGE WAVEFORMSPULSE DURATIONVCC0 VtrecCLK50% VCCVOLTAGE WAVEFORMSRECOVERY TIMEVCC0 VtPLHIn-PhaseOutput50%10%tPHLOut-of-PhaseOutput90%90%tr50% VCC10%tftPHL90%VOH50% VCC10%VOLtfV90%OHtrVOLOutputWaveform 1(see Note B)tPZHOutputWaveform 2(see Note B)50% VCCOutputControltPZL50% VCC50% VCC50% VCC0 VtPLZVCC0 VData50%Input10%ReferenceInputtsu90%trVCC50% VCC0 Vth90%VCC50% VCC10%0 Vtf50% VCC0 VS2ClosedOpenClosedOpenOpen From OutputUnder TestCL(see Note A)TestPointtdisS2tpd or ttLOAD CIRCUITCLRInput50% VCCVOLTAGE WAVEFORMSSETUP AND HOLD AND INPUT RISE AND FALL TIMESVCCInput50% VCC50% VCC≈VCC10%tPHZ90%VOH≈0 VVOLtPLH50%10%VOLTAGE WAVEFORMSPROPAGATION DELAY AND OUTPUT TRANSITION TIMESVOLTAGE WAVEFORMSOUTPUT ENABLE AND DISABLE TIMESNOTES:A.CL includes probe and test-fixture capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the followingcharacteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.D.For clock inputs, fmax is measured with the input duty cycle at 50%.E.The outputs are measured one at a time with one input transition per measurement.F.tPLZ and tPHZ are the same as tdis.G.tPZL and tPZH are the same as ten.H.tPLH and tPHL are the same as tpd.Figure 1. Load Circuit and Voltage Waveforms6POST OFFICE BOX 655303 DALLAS, TEXAS 75265• CD74HCT4543BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER SCHS281A – REVISED MAY 2003APPLICATION CIRCUITSAppropriateVoltageHCT4543OutputPHOne of SevenSegmentsCommonBackplaneHCT4543OutputPHGNDSquare Wave:GND to VCCFigure 2. Connection to Liquid-CrystalDisplay (LCD)AppropriateVoltageFigure 3. Connection to IncandescentDisplayHCT4543OutputPHGNDPHGNDGND or AppropriateVoltage Below GNDHCT4543OutputTo FilamentSupplyFigure 4. Connection to Gas-DischargeDisplayFigure 5. Connection to Fluorescent DisplayPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•7PACKAGEOPTIONADDENDUM
www.ti.com
12-Jan-2006
PACKAGINGINFORMATION
OrderableDeviceCD74HCT4543ECD74HCT4543EE4
(1)
Status(1)ACTIVEACTIVE
PackageTypePDIPPDIP
PackageDrawing
NN
PinsPackageEcoPlan(2)
Qty1616
2525
Pb-Free(RoHS)Pb-Free(RoHS)
Lead/BallFinishCUNIPDAUCUNIPDAU
MSLPeakTemp(3)N/AforPkgTypeN/AforPkgType
Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.Samplesmayormaynotbeavailable.OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)
EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheckhttp://www.ti.com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails.TBD:ThePb-Free/Greenconversionplanhasnotbeendefined.
Pb-Free(RoHS):TI'sterms\"Lead-Free\"or\"Pb-Free\"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.1%byweightinhomogeneousmaterials.Wheredesignedtobesolderedathightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses.
Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieandpackage,or2)lead-baseddieadhesiveusedbetweenthedieandleadframe.ThecomponentisotherwiseconsideredPb-Free(RoHScompatible)asdefinedabove.
Green(RoHS&noSb/Br):TIdefines\"Green\"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflameretardants(BrorSbdonotexceed0.1%byweightinhomogeneousmaterial)
(3)
MSL,PeakTemp.--TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
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Addendum-Page1
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